OpenVera Assertions Language Reference Manual

The guidelines covered in this document are organized according to the different aspects of OVA Checker IP construction. They are organized as follows: • Modeling strategy, including IP structure • Naming conventions • Coding guidelines, including general, modeling, and encapsulation guidelines. Examples are provided throughout this document based on the PCI OVA Checker. OVA IP is intentionally packaged so that you can easily use IP with both VHDL and Verilog designs by binding the appropriate OVA unit from the IP to the design module or instance. This is the preferred method for connecting the checker to the design or testbench. [via]

http://www.open-vera.com/technical/OVAIPGuide...